1. Field of the Invention
The present invention relates to a solid-state imaging device, a method for manufacturing the solid-state imaging device, and an electronic apparatus.
2. Description of the Related Art
Electronic apparatuses such as digital video cameras and digital still cameras include solid-state imaging devices. Examples of the solid-state imaging devices include a complementary metal-oxide semiconductor (CMOS) image sensor and a charge coupled device (CCD) image sensor.
In the solid-state imaging device, an imaging region in which a plurality of pixels are formed is arranged on a semiconductor substrate. In each of the plurality of pixels, a photoelectric conversion portion is arranged. The photoelectric conversion portion is, for example, a photodiode and generates signal charge by receiving incident light on a light-receiving surface, the incident light coming in through an external optical system, and subjecting the received incident light to photoelectric conversion.
In the CMOS image sensor among the solid-state imaging devices, in addition to the photoelectric conversion portion, a pixel is configured to include a plurality of transistors. As pixel transistors, the plurality of transistors are configured to read out and output signal charge generated in the photoelectric conversion portion, to a signal line as an electric signal. For example, four transistors, namely, a transfer transistor, a reset transistor, an amplification transistor, and a selection transistor are arranged as the pixel transistors on the surface of the semiconductor substrate. In addition, wiring lines electrically connected to the plurality of transistors included in the pixel transistors are arranged on the surface of the semiconductor substrate.
In the CMOS image sensor, in order to decrease the size of pixels, it is proposed that pixels are configured so that a plurality of photoelectric conversion portions share the pixel transistors mentioned above. For example, a technique in which two or four photoelectric conversion portions share one pixel transistor group is proposed (for example, refer to Japanese Unexamined Patent Application Publication Nos. 2004-172950, 2006-157953, and 2006-54276).
In addition, a back-illuminated CMOS image sensor in which the back side of the semiconductor substrate is subjected to light, the back side being opposite to the side of the surface of the semiconductor substrate on which wiring lines and pixel transistors are arranged, is proposed (for example, refer to Japanese Unexamined Patent Application Publication No. 2005-347325).
In the example mentioned above, an element isolation portion is arranged on a substrate so as to isolate a plurality of pixels from one another. For example, a shallow trench isolation (STI) region is arranged, as the element isolation portion, on a semiconductor substrate. In addition, an impurity diffusion region is arranged, as the element isolation portion, on the semiconductor substrate. For example, a method, such as an EDI separation method, in which the impurity diffusion region is formed in the semiconductor substrate and a thick insulation layer is further arranged on the impurity diffusion region is proposed (for example, refer to Japanese Unexamined Patent Application Publication Nos. 2005-347325, 2006-93319, and 2006-216577). Japanese Unexamined Patent Application Publication No. 2009-88447 is an example of related art.